As silicon devices become smaller and faster, device input speeds and signal integrity requirements increase. Using differential or reference receivers is one way to meet both speed and signal integrity requirements. In differential signaling, a differential receiver receives and processes two complementary signals (e.g., determining that the differential signal represents as logical 1 or 0 based on which complementary signal is greater than the other). In reference-voltage signaling (also referred to herein as “single-ended signaling”), a reference receiver compares a single, received signal to a specified reference-voltage level (e.g., determining that the received signal represents a logical 1 or 0 based on whether the received signal is greater than or less than the specified reference-voltage level.
Differential and reference receivers offer the capability to receive reduced signal swings for increased interface speeds and common-mode noise immunity. The increased speed of the interface is achieved on both the transmit side of the interface and the receive side of the interface, due to the reduced signal swings. Examples of such interfaces are Low-Voltage Differential Signaling (LVDS) or Reduced-Swing Differential Signaling (RSDS), Hyper transport, High-Speed Transceiver Logic (HSTL), Stub Series Terminated Logic (SSTL), and Gunning Transceiver Logic (GTL). Each of these interfaces can operate with different common-mode voltages, where the common-mode voltage is the average voltage of two differential-signal voltages at any given time.
One difficulty in the past has been to design a single receiver capable of supporting all or even most of these different signal standards, because each has its own signal-level requirements and common-mode voltage requirements or reference-voltage requirements. This problem becomes more difficult as technology progresses. As the technology is pushed toward lower voltages and increased speeds, there is still a desire to support the older, higher-voltage signaling standards having higher common-mode voltages.
In general, the larger the gain of a receiver stage, the lower the performance (i.e., bandwidth). As such, in order to provide both high gain and high performance, differential and reference receivers are often designed with multiple high-performance stages, where each high-performance stage is designed to increase the gain of the previous stage. Such stages typically each have a current source that uses power. As a result, multi-stage differential and reference receivers dissipate a relatively high level of DC power. Typically, the higher the speed capability and the larger the common-mode range, the more power the receiver will use.